Hierarchical Test Generation with Built-In Fault Diagnosis
نویسندگان
چکیده
A hierarchical test generation method is presented that uses the inherent hierarchical structure of the circuit under test and takes fault diagnosability into account right from the start. An efficient test compaction method leads to a very compact test set, while retaining a maximum of diagnostic power and a 100% fault coverage for non-fanout circuits. An extension for fanout circuits is also presented.
منابع مشابه
A hierarchical test generation methodology for digital circuits
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